A Petri-net-based communication-aware modeling for performance evaluation of NOC application mapping

Abstract

Advances in digital system manufacturing and increasing demand for high-speed applications have urged designers on using multiprocessor systems. Network on chip (NOC) is an important architecture used for implementing multiprocessor systems. The main challenge in designing a NOC is application mapping in which an efficient task-core assignment is investigated. Different types of algorithms with different objectives have been proposed by researchers. Due to the bandwidth constraint, application runtime is the most important objective in different methods. However, most of the previous works have employed a simple and inaccurate metric to evaluate the application runtime. In this work, a Petri-net-based modeling approach is presented to provide accurate estimation of the application runtime. Considering the parallelism in concurrent tasks and communications, as well as exclusion in computations and communications with common resources, is the main advantage of the presented model. The experimental results show considerable improvement in the accuracy in the proposed method compared to the previous works.